# Apple //c Smartport Compact Flash Adapter

## Introduction

I have been keen to try and get a Compact flash adapter for my //c, but after much searching of the internet, it seemed that nothing existed. There has been some discussions on this, but nothing complete has been published yet. I decided to have a go and use this as a learning exercise to become familiar with the AVR microcontrollers.
The aim was to have it compatible with the CFFA images so I could use Cider Press to create them. And be able to swap the CF cards to a CFFA.

The result of this is a working smartport compact flash adapter using an Atmega32 microcontroller. I am able to boot up prodos with this plugged into my //c external disk port. I have also tested with the disk image containing dos.master on it, all works fine.

Things To do: 1. Draw up a proper complete schematic. There is enough info below to detail how to build one.
2. Design a PCB.

Below I have tried to describe some of the details. There is more to write up, but this will cover the basics.

##
Hardware

Some initial searching of the internet for the CF/ATA interface part that would be required resulted in the following website.
http://www.opend.co.za/hardware/avride/avride.htm

As I had an Atmega32 on hand and this is a normal dip package that would be easy to wire up a prototype with, I decided to use this for the CF interface. I have removed all of the FAT software and just used the ATA part of this code.

The IDE/CF part was wired up as per the schematic on the link above. There was one exception, I did not connect the IRQ line from the IDE connector. I needed this extra I/O pin to connect to the apple disk connector.

For the IDE/CF connection I used a normal 40pin header and then I bought a CF to IDE adaptor to allow the CF card to be connected.

The prototype has a 14.31818MHz crystal connected to it. I thought that it would be good to have this run at the same speed as the apple. I don’t think this is really needed. When I get some more time I will redo it using the internal 8Mhz clock of the Atmega32. This will require some adjustments to the timing in the assembler send and receive routines. If this works then the only hardware needed is the actual Atmega32 microcontroller. The serial interface is only needed for debugging, so can be omitted to keep the design simpler.

Power for the board is received from the apple disk connector, see below.

The Apple external disk connector is a 19 pin D type. These are not that common, so I chose to use the cable that connects my DuoDisk to my //e. This has a 19pin D on one end and a 25pin D on the other end. This enabled me to use an old 25 pin D to inline header from a pc port. The connections for the apple connector to the Atmega32 are as follows:

Cable pin details

IIc DB 19 DB 25 Atmega32

GND 1 2 GND to board
GND 2 4 GND to board
GND 3 9 & 21
GND 4 10 & 14
-12V 5 23
+5V 6 7 +5v to board
+12V 7 19
+12V 8 20
EXTINT 9 8
WRPROT 10 12 35 PA5 (ACK for smartport)
PH0 11 15 16 PD2 (REQ for smartport)
PH1 12 16 17 PD3
PH2 13 17 18 PD4
PH3 14 18 19 PD5
WREQ 15 5
(NC) 16 24
DRVEN 17 11
RDDATA 18 3 20 PD6
WRDATA 19 6 21 PD7

Diagram with connector pinout details

Would be good to design a PCB for this, maybe in the future.

This is a picture of the prototype connected, this has the serial cable to the pc and my usb avr programmer:

And a closer view of the prototype board:

And of the bottom:

## Software

This was the interesting part. There is not that much clear documentation available for the smartport. The Apple IIGS Firmware manual has the most information in it (refer chapter7). This was a great resource. Another source of useful information was the firmware listing for the memory expandable //c. This is available in the later revision Apple //c Technical reference manual. I have a physical copy of both of these books. The IIGS firmware manual is available on the net in pdf format, but the later rev //c tech ref manual is not.

I chose to create two assembler routines to handle the sending and receiving of the smartport packets. These have been coded to have the timing correct to support the reading and writing of data via the apple disk interface read and write lines. These need to support sending a bit every 4us with a total time of 32us for 8bits of data. The smartport packet bytes always have the msb set, but the rest of the bits can be either 0 or 1. So the values can be 0x80 to 0xff. This is different to that of the floppy disk drive encoding scheme, which has to ensure that no more than 2 zeros occur consecutively (dos3.3).

The rest of the code is written in C. It has evolved as I worked through trying to work out what is required to make the smartport work. I have tidied it up once the basics were working. It really could do with more of a rewrite as there is some repetitive parts in it, but this will do for now. Most of the basic functionality to make it work is there. There is not really much error checking, this would be nice to add some more in. There is really only the checking of the write data checksum. The Apple IIGS Firmware guide details the smartport packet coding of data.

The SmartportCFA supports the following smartport cmd packets:
00: Status – currently only supports status code $00 and is hardcoded to report 65536 blocks
01: ReadBlock – read a 512 byte block
02: WriteBlock – write a 512 byte block
03: Format – just returns successful without doing anything, as the CF does not need the low level format
05: Init – This is received on bootup to assign the device IDs to the 4 supported partitions

It currently is hard coded to support 4 32MB partitions on the CF. The SmartportCFA responds to the bus ID requests 4 times, so it looks like 4 independent devices to the apple //c. Each of the partitions reports 0xffff blocks.

It is also limited to being the last device in the drive chain. I have tested it only with it being connected to my Memory expandable //c as the only external drive. The floppy is usable with it plugged in. If a floppy disk is in the internal drive of the //c, it will boot. Otherwise it will boot from the first partition on the SmartportCFA.

I was able to use Ciderpress and write an image for the CFFA card onto a CF and successfully boot this when installed in the SmartportCFA. I also loaded the image containing games with dos.master. Once I worked out how to reconfigure dosmaster to use slot 5, it worked perfectly. (Hence the joystick in the picture above J)

I believe that this should work with a IIgs, I don’t have one so this has not been tested. It does not support the IIgs smartport extended calls at the moment. This would not take to much to implement if needed. It would also be nice to test it with an external Unidisk 3.5 drive in the chain before this. Again, as I don’t own one, this has not been tested.

Atmega32 Firmware:

V1.04 SmartportCFA_source.rar

V1.04 SmartportCFA_src_and_binaries.rar
The Firmware has been compiled using WinAVR-20100110

## Smartport Detailed Technical Description

I have learned a lot about the smartport protocol along the way. I’ll add in some details at some later stage when I get some time to write it up.

I have captured some log files along the way. These are a bit random, but may give some insight to the packets and their structure.
Serial port log files

## Other future possibilities

A variation using an SD card would be interesting. There are a few AVR SD card interface projects around, so this should be fairly easy to replace the CF part with the SD Card software. This may also lead to being able to use a smaller micro with less I/O pins. The 3.3 to 5v would also need to be adapted.

A PCB for this to house it inside the //c. Maybe then some way of switching between partitions may be needed, as it would be difficult to change the CF once installed. This would be fairly easy to implement as the Smartport calls are flexible enough to add some extra commands that would enable communication to the AVR from an apple based utility.

## References

Apple IIGS Firmware Reference ISBN 0-201-17744-7 – Chapter 7
Apple IIc Technical Reference Manual ISBN 0-201-17752-8 – Appendix I Firmware listings - Protocol Converter
Apple Smartport technical note – smartport packet
Inside the Apple II - Chapter 9
Beneath Apple Dos

Contact: Robert Justice rjustice(at)internode.on.net

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